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PO Box 8091 Stanford, CA 94309. |
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(650) 723 0503 |
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(650) 723 4659 |
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amir@darius.stanford.edu |
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http://www.stanford.edu/~amiralam |
EDUCATIONAL AND WORK BACKGROUND:
BS: Sharif University of Technology, Tehran, Iran, Jan. 1993
MS: Sharif University of Technology, Tehran, Iran, Sep. 1994
MS: Stanford University, Stanford, CA, Mar. 1996
RECENT PUBLICATIONS:
1.
"Exploiting Structure in Fast Aerial Image Computation for Integrated
Circuit Patterns", Y.C. Pati, Amir A. Ghazanfarian, Fabian Pease, SPIE
conference on Microlithography, Feb. 1996.
2.
"Minimizing Alignment Error Induced by Resist Coating", Xun Chen, Amir
A. Ghazanfarian, Fabian Pease, Techcon conference, Sep. 1996.
3.
"Exploiting Structure in Fast Aerial Image Computation for Integrated
Circuit Patterns", Y.C. Pati, Amir A. Ghazanfarian, Fabian Pease, IEEE
transactions on Semiconductor Manufacturing, Vol.10, No.1, Feb. 1997.
4.
"A new approach to global alignment in IC manufactring based on
a neural network model", Amir A. Ghazanfarian, Fabian Pease, Xun Chen,
Mark A. McCord, SPIE conference on Microlithography, Mar. 1997.
5.
"A Neural Network Model for Global Alignment Incorporating Wafer
and Stage Distortions", Amir A. Ghazanfarian, Fabian Pease, Xun Chen,
Mark A. McCord, The 41st International Conference on Electron, Ion and
Photon Beam Technology and Nanofabrication, May 1997
Last updated 6/26/1997.
Any suggestions? Please mail to
Gökhan Perçin
